TUESDAY, June 11, 2002 09:00 AM - 10:00 AM | Room: Auditorium    KEYNOTE    Paradigm Shift in Semiconductor Design: Challenges on the CAD System      Last year, the Semiconductor industry suffered the severest recession in its history, withering by 32%. There had been no case where the final market of electronic products itself shrank. Concurrently, there have been some symbolic events in the industry. First, Moore's Law has become uncertain. In order to maintain the law, we must come up with novel processes for each new generation. Secondly, vendors have begun to shift from mass-production oriented business schemes to the system LSI business. This shift to application specific devices requires a drastic review of the value chain. Semiconductor design in the new era can be divided into three areas. Area 1 deals with the traditional design hierarchy, such as function design, logic design and layout design. In this area, a revolution in function design is especially required that is represented by C language-based design. Area 2 deals with the new challenges of pursuing shrink technology. We should be prepared for problems resulting from the application of new materials, represented by electric current leakage through the gate insulator. Also, interconnect structure is another challenging problem. The merger of design and process is the key. Area 3 deals with comprehensive issues such as IP management and mass production know-how. The industry will become much more dependent on design. The challenge is how we should cultivate competitive designers both in quantity and quality. The "design project leader" must cover all three areas above. The corporate structure of IDM does not carry a competitive advantage, as long as design and process is divided into further sub-segments. When the industry can provide a solution that best meets its customer's needs and niceties from every angle, the industry will take off again and reach a new prosperous stage. Biography: Mr. Hajime Sasaki was born in 1936. After receiving a master's degree of engineering in the field of electrical engineering from the graduate school of the University of Tokyo in 1961, he joined NEC Corporation. He served as General Manager of the VLSI Development Division and General Manager of the Microcomputer Products Division before being elected to the Board of Directors in 1988. He was appointed Senior Executive Vice President in 1996 in charge of semiconductors operations, and in 1999 elected to his current position of Chairman of the Board. Mr. Sasaki received the commendation from the Minister of State for Science and Technology, as a person of scientific and technological merits in 1995. In 2000, he received the Third Millennium Medal from IEEE. Also he was elected as the member of NAE (National Academy of Engineering).In 2001, he received Robert N. Noyce Medal from IEEE and was elected as an IEEE Life Fellow.    Speaker(s): Hajime Sasaki - NEC Corp., Tokyo, Japan