Wednesday, June 12, 2002, 4:30 PM - 6:00 PM | Room: Auditorium A SESSION 32    Multi-Voltage, Multi-Threshold Design    Chair: Rajendran Panda - Motorola, Inc., Austin, TX    Organizers: Renu Mehra, Sarma Vrudhula    The availability of multiple supply voltages and dual threshold voltage offers new opportunities for making tradeoffs between energy consumption and performance. The first paper presents a method to optimally assign high Vt transistors to cluster of low Vt gates for reducing the leakage power. The second paper describes a practical methodology for dual Vt assignment and gate sizing. The third paper presents a novel application fo optimal use of multiple supply voltages.      32.1 Dynamic and Leakage Power Reduction in MTCMOS Circuits Using an Automated Efficient Gate Clustering Technique    Speaker(s): Mohab H. Anis - Univ. of Waterloo, Waterloo, ON, Canada    Author(s): Mohab H. Anis - Univ. of Waterloo, Waterloo, ON, Canada Shawki M. Areibi - Univ. of Guelph, Guelph, ON, Canada Mohamed K. Mahmoud - Univ. of Waterloo, Waterloo, ON, Canada Mohamed Elmasry - Univ. of Waterloo, Waterloo, ON, Canada      32.2 Total Power Optimization By Simultaneous Dual-Vt Allocation and Device Sizing in High Performance Microprocessors    Speaker(s): Tanay Karnik - Intel Corp., Hillsboro, OR    Author(s): Tanay Karnik - Intel Corp., Hillsboro, OR Yibin Ye - Intel Corp., Hillsboro, OR James Tschanz - Intel Corp., Hillsboro, OR Liqiong Wei - Intel Corp., Hillsboro, OR Steven M. Burns - Intel Corp., Hillsboro, OR Vivek K. De - Intel Corp., Hillsboro, OR Shekhar Y. Borkar - Intel Corp., Hillsboro, OR Venkatesh Govindarajulu - Intel Corp., Austin, TX      32.3 An Optimal Voltage Synthesis Technique for a Power-Efficient Satellite Application    Speaker(s): Dong In Kang - USC/ISI, Arlington, VA    Author(s): Dong In Kang - USC/ISI, Arlington, VA Jinwoo Suh - USC/ISI, Arlington, VA Stephen P. Crago - USC/ISI, Arlington, VA