1 PANEL: Wall Street Evaluates EDA
2 Web and IP Based Design
3 Design Innovations for Embedded Processors
4 Passive Model Order Reduction
5 New Perspectives in Physical Design
6 PANEL: Tools or Users: Which is the Bigger Bottleneck?
7 SPECIAL SESSION: Life After CMOS: Imminent or Irrelevant?
8 Formal Verification
9 High Level Specification and Design
10 Timing Abstraction
11 SPECIAL SESSION: E-Textiles
12 PANEL: Analog Intellectual Property: Now? or Never?
13 Low-Power System Design
14 Fabric-Driven Logic Synthesis
15 Memory Management and Address Optimization in Embedded Systems
16 SPECIAL SESSION: Optics: Lighting the Way to EDA Riches?
17 PANEL: Nanometer Design: What Hurts Next?
18 Novel DFT, BIST and Diagnosis Techniques
19 Case Studies in Embedded System Design
20 Theoretical Foundations of Embedded System Design
21 Equivalence Verification
22 PANEL: Whither (or Wither?) ASIC Handoff?
23 Embedded Software Automation: From Specification to Binary
24 Applications of Reconfigurable Computing
25 New Test Methods Targeting Non-Classical Faults
26 SPECIAL SESSION: How Do You Design a 10M Gate ASIC?
27 Power Distribution Issues
28 Advances in Synthesis
29 Analog Synthesis & Design Methodology
30 Low-Power Physical Design
31 PANEL: Unified Tools for SoC Embedded Systems: Mission Critical, Mission Impossible or Mission Irrelevant?
32 Multi-Voltage, Multi-Threshold Design
33 Advanced Simulation Techniques
34 Design Methodologies Meet Network Applications
35 Advances in Analog Modeling
36 Advances in Timing and Simulation
37 PANEL: Formal Verification Methods: Getting Around the Brick Wall
38 Routing and Buffering
39 System on Chip Design
40 Timing Analysis and Memory Optimization for Embedded Systems
41 Processors and Accelerators for Embedded Applications
42 PANEL: What is the Next EDA Driver?
43 Cross-Talk Noise Analysis and Management
44 Test Cost Reduction for SoCs
45 Scheduling Techniques for Embedded Systems
46 SPECIAL SESSION: Designing SoCs for Yield Improvement
47 Advances in SAT
48 Inductance and Substrate Analysis
49 Development of Processors and Communication Networks for Embedded Systems
50 Moving Towards More Effective Validation
51 SPECIAL SESSION: Energy Efficient Mobile Computing
52 Floorplanning and Placement
53 Circuit Effects in Static Timing
54 Design Space Exploration for Embedded Systems
55 Behavioral Synthesis

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