+ 1 Special Session: Real Challenges and Solutions for Validating System-on-Chip
+ 2 Panel: Reshaping EDA for Power
+ 3 Design for Manufacturability and Global Routing
+ 4 Design Analysis Techniques
+ 5 Embedded Hardware Design Case Studies
+ 6 Special Session: Emerging Design and Tool Challenges in RF and Wireless Applications
+ 7 Panel: COT - Customer Owned Trouble?
+ 8 Power Grid Analysis and Optimization
+ 9 Low-Power Embedded System Design
+ 10 Cyclic and Non-Cyclic Combinational Circuit Synthesis
+ 11 Managing Leakage Power
+ 12 Panel: Emerging Markets: Design Goes Global
+ 13 Timing-Oriented Placement
+ 14 Model Order Reduction
+ 15 Issues in Partitioning and Design Space Exploration for Codesign
+ 16 Special Session: Nano Technology: Design Implications and CAD Challenges
+ 17 Panel: Mixed Signals on Mixed-Signal: The Right Next Technology
+ 18 Simulation Coverage and Generation for Verification
+ 19 Tool Support for Architectural Decisions in Embedded Systems
+ 20 New Topics in Logic Synthesis
+ 21 Special Session: Coping with Variability: The End of Deterministic Design
+ 22 Panel: Cheap Submicron: The Next Implementation Fabric/An IEEE D&T Feature Panel
+ 23 Testbench, Verification and Debugging: Practical Considerations
+ 24 Delay and Noise Modeling in the Nanometer Regime
+ 25 Modeling Issues in the Design of Embedded Systems
+ 26 Special Session: How Application/Technology Evolutions Will Shape Classical EDA?
+ 27 SAT and BDD Algorithms for Verification Tools
+ 28 Elements of Functional and Performance Analysis
+ 29 Nonlinear Model Order Reduction
+ 30 Novel Techniques in High-Level Synthesis
+ 31 Mixed-Signal Design and Simulation
+ 32 Panel: Nanometer Design: Place Your Bets
+ 33 Novel Self-Test Methods
+ 34 Technology Mapping, Buffering, and Bus Design
+ 35 Compilation Techniques for Reconfigurable Devices
+ 36 Architectural Power Estimation and Optimization
+ 37 Panel: Libraries: Lifejacket or Straitjacket?
+ 38 Techniques for Reconfigurable Logic Applications
+ 39 Test and Diagnosis for Complex Designs
+ 40 Special Session: Highlights of ISSCC: High-Speed Heterogenous Design Techniques
+ 41 Special Session: Highlights of ISSCC and The Design of State- of- the- Art Microprocessors
+ 42 Panel: Formal Verification: Prove it or Pitch it
+ 43 High Frequency Interconnect Modeling
+ 44 Novel Approaches in Test Cost Reduction
+ 45 Retargetable Tools for Embedded Software
+ 46 Special Session: ASIC Design in Nanometer Era - Dead or Alive?
+ 47 Floorplanning and Placement
+ 48 Advances in SAT
+ 49 Novel Design Methodologies and Signal Integrity
+ 50 Memory Optimization for Embedded Systems
+ 51 Special Session: Design Automation for Quantum Circuits
+ 52 Energy-Aware System Design
+ 53 Budgeting, Simulation and Statistical Timing
+ 54 Interconnect Noise Avoidance Methodologies and Slew Rate Prediction
+ 55 Analog Design Space Exploration



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