Martin Wong - Univ. of Illinois, Urbana, IL
| | Organizers: Charles J Alpert, Dennis Sylvester, Raymond Nijssen
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| | This session addresses manufacturability topics that become prominent in subwavelength lithography as well as issues relating to the prominence of global interconnections in IC performance. The first paper focuses on reducing the cost of making optical proximity corrections by manipulating commercial sizing tools. The second paper describes a first approach to limiting the impact of metal fill on circuit delay. The third paper proposes a new method to reduce congestion in global routing by avoiding unnecessary detours. The final presentation presents an example showing the relationship between architecture and physical design.
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| |  3.1 |
A Cost-Driven Lihographic Correction Methodology Based on Off-the-Shelf Sizing Tools
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| | Speaker(s): | Puneet Gupta - Univ. of California at San Diego, La Jolla, CA
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| | Author(s): | Puneet Gupta - Univ. of California at San Diego, La Jolla, CA
Andrew B. Kahng - Univ. of California at San Diego, La Jolla, CA
Dennis Sylvester - Univ. of Michigan, Ann Arbor, MI
Jie Yang - Univ. of Michigan, Ann Arbor, MI
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| | 3.2 | Performance-Impact Limited Area Fill Synthesis |
| | Speaker(s): | Yu Chen - Univ. of California, Los Angeles, CA
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| | Author(s): | Yu Chen - Univ. of California, Los Angeles, CA
Puneet Gupta - Univ. of California, San Diego, CA
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| | 3.3s | Improved Global Routing by Amplified Congestion Estimation |
| | Speaker(s): | Raia T. Hadsell - Binghamton Univ., Binghamton, NY
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| | Author(s): | Raia T. Hadsell - Binghamton Univ., Binghamton, NY
Patrick H. Madden - State Univ. of New York, Binghamton, NY
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| | 3.4s | Microarchitecture Evaluation With Physical Planning |
| | Speaker(s): | Michail Romesis - Univ. of California, Los Angeles, CA
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| | Author(s): | Jason Cong - Univ. of California, Los Angeles, CA
Ashok Jagannathan - Univ. of California, Los Angeles, CA
Glenn Reinman - Univ. of California, Los Angeles, CA
Michail Romesis - Univ. of California, Los Angeles, CA
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