Date Modified:     03/31/2004
Company Name:     Verific Design Automation
Booth Number:    1435,

Booth Number(s):  1435

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80 Word Final Program Company Abstract

Verific Design Automation developes Verilog, VHDL, and SystemVerilog parsers, analyzers, and elaborators for the EDA market. With 27 licensees and more than 20,000 end-users, it is the premier provider of HDL front-end solutions. Our customers' applications include synthesis, formal verification, emulation, design-for-test, logic equivalence, RTL debug, and virtual prototyping tools. Add-on products include PSL/Sugar and Verilog-AMS, as well as Verilog 2001 and SystemVerilog test suites. Verific licenses its software royalty-free and ships C++ source code to its customers.`

Company Description

Verific Design Automation developes Verilog, VHDL, and SystemVerilog parsers, analyzers, and elaborators for the EDA market. With 27 licensees and more than 20,000 end-users, it is the premier provider of HDL front-end solutions. Our customers' applications include synthesis, formal verification, emulation, design-for-test, logic equivalence, RTL debug, and virtual prototyping tools. Add-on products include PSL/Sugar and Verilog-AMS, as well as Verilog 2001 and SystemVerilog test suites. Verific licenses its software royalty-free and ships C++ source code to its customers.