43rd DAC Thursday Matrix

Conference Program At-a-Glance Thursday

click a day or click a color

Sunday-Monday | Tuesday | Wednesday | Thursday | Friday

THURSDAY
Exhibit Hours - 9:00 am to 1:00 pm

Rm#

306/308

307

305

304

303

301

Ses#

Session 40

Session 41

Session 42

Session 43

Session 44

Session 45

HoT

TIME	Pavilion Panels
9:00
9:15
9:30
9:45
10:00	Developing Consumer SoCs - IP and Automation or Sticks and Duct Tape?
10:15
10:30
10:45
11:00	Wireless USB - The Next Ubiquitous Connectivity Standard?
11:15
11:30
11:45
12:00	Troubleshooting the Multi-Processor SoC Design Flow
12:15
12:30
12:45
1:00

8:30 to 10:00

PANEL: Tomorrow's Analog: Just Dead or Just Different

Nanotubes and Nanowires

Simulation Assisted Formal Verification

Yield Analysis and Improvement

Approaches to Soft Error Mitigation

Design-
Technology Interaction

BREAK 10:00 - 10:30 am

Ses#

Session 46

Session 47

Session 48

Session 49

Session 50

Session 51

10:30 to 12:00

PANEL: Building a Verification Test Plan: Trading Brute Force for Finesse

Special Session: More Moore's Law and More than Moore's Law

Formal Specification and Verification Testbench Generation

Analysis
and Optimization Issues in NoC Design

Special Session:
Key Technologies for Beyond the Die

Analog Design
and
Design Assistance

Best Paper Award Presentations and Keynote Addresss
The Challenges of Convergence
12:45 - 1:45 pm | Gateway Ballroom
Alessandro Cremonesi -
STMicroelectronics, Strategy and System Tech. Group Vice President and Advance System Technology General Manager

Ses#

Session 52

Session 53

Session 54

Session 55

Session 56

Session 57

HoT

2:00 to 4:00

High-Performance Simulation of Transaction Level and Dataflow Models

Nano-
and
Bio-Chip Design

Logic
and
Sequential Synthesis