· Daily Matrices
· DAC Pavilion Panels
· Management Day@DAC
· Wireless Wednesday
· Search the Program

· Keynotes
· Papers
· Panels
· Special Sessions
· Monday Tutorial
· Friday Tutorials

· Intro to EDA
· Integrated Design Systems Workshop
· UML for SoC Design
· Women's Workshop

· RTL Handoff
· Core-based SoC Design























TUESDAY, June 14, 2005, 2:00 PM - 4:00 PM | Room: 208AB
TOPIC AREA:  NANOMETER ANALYSIS AND SIMULATION (tools)

   SESSION 10
  Advances in Boundary Element Methods for Parasitic Extraction
  Chair: J. Eric Bracken - Ansoft Corporation, Pittsburgh, PA
  Organizers: Yehea Ismail, Sachin S. Sapatnekar

  This session presents advances in parasitic extraction based on boundary element methods. The first paper presents a surface-volume method for inhomogeneous substrates. The second paper presents a full-wave technique for impedance conduction over layered substrates. The third paper presents an extraction approach for spatially distributed 3D circuit models. The fourth paper presents a direct multilevel method for fast capacitance extraction, and the fifth paper presents a reordering and transformation method for accelerating capacitance extraction.

    10.1   A Green Function-Based Parasitic Extraction Method for Inhomogeneous Substrate Layers
  Speaker(s): Chenggang Xu - Oregon State Univ., Corvallis, OR
  Author(s): Chenggang Xu - Oregon State Univ., Corvallis, OR
Ranjit Gharpurey - Univ. of Michigan, Ann Arbor, MI
Terri Fiez - Oregon State Univ., Corvallis, OR
Kartikeya Mayaram - Oregon State Univ., Corvallis, OR
    10.2Analysis of Full-Wave Conductor System Impedance Over Substrate Using Novel Integration Techniques
  Speaker(s): Xin Hu - Massachusetts Institute of Tech., Cambridge, MA
  Author(s): Xin Hu - Massachusetts Institute of Tech., Cambridge, MA
Jung Hoon Lee - Massachusetts Institute of Tech., Cambridge, MA
Jacob White - Massachusetts Institute of Tech., Cambridge, MA
Luca Daniel - Massachusetts Institute of Tech., Cambridge, MA
    10.3Spatially Distributed 3D Circuit Models
  Speaker(s): Michael Beattie - IBM Corp., Austin, TX
  Author(s): Michael Beattie - IBM Corp., Austin, TX
Hui Zheng - IBM Corp., Austin, TX
Byron Krauter - IBM Corp., Austin, TX
Anirudh Devgan - IBM Corp., Austin, TX
    10.4sDiMES: Multilevel Fast Direct Solver based on Multipole Expansions for Parasitic Extraction of Massively Coupled 3D Microelectronic Structures
  Speaker(s): Dipanjan Gope - Univ. of Washington, Seattle, WA
  Author(s): Dipanjan Gope - Univ. of Washington, Seattle, WA
Indranil Chowdhury - Univ. of Washington, Seattle, WA
Vikram Jandhyala - Univ. of Washington, Seattle, WA
    10.5sICCAP: A Linear Time Sparse Transformation and Reordering Algorithm for Three-Dimensional BEM Capacitance Extraction
  Speaker(s): Rong Jiang - Univ. of Wisconsin, Madison, WI
  Author(s): Rong Jiang - Univ. of Wisconsin, Madison, WI
Charlie Chung-Ping Chen - Univ. of Wisconsin, Madison, WI
Yi-Hoa Chang - Natl. Taiwan Univ., Taipei, Taiwan