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 |  TUESDAY, June 14, 2005, 4:30 PM - 6:30 PM | Room: 208AB |
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TOPIC AREA: EMBEDDED SYSTEMS (methods)
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SESSION 15
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| | Performance, Energy, and Fault-Tolerance Considerations for MPSoC Designs
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| | Chair: Gerd Ascheid - RWTH Aachen Univ., Aachen, Germany
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| | Organizers: Radu Marculescu, Rainer Leupers
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| | For hardware-software co-design, the evaluation and fine tuning of the architecture, software, and individual components represent a critical step toward matching the tight design constraints and providing quick feedback to system designers.
The system-level papers selected for this session cover a broad range of techniques and optimization metrics which can support various architectures and platforms. The first three papers deal with early analytical and simulation-based performance evaluation and cost-effective implementation. The last two papers present possible energy/fault-tolerance trade-offs relevant to both computation and communication infrastructure design.
By attending this session the audience will get a deep insight into the most stringent issues that system designers have to deal with in order to design tomorrow's complex MPSoCs.
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| | 15.1 |
Approximate VCCs: A New Characterization of Multimedia Workloads for System-level MpSoC Design
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| | Speaker(s): | Yanhong Liu - National Univ. of Singapore, Singapore
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| | Author(s): | Yanhong Liu - National Univ. of Singapore, Singapore
Samarjit Chakraborty - National Univ. of Singapore, Singapore
Wei Tsang Ooi - National Univ. of Singapore, Singapore
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| | 15.2 | Modular Domain-specific Implementation and Exploration Framework for Embedded Software Platforms. |
| | Speaker(s): | Christian Sauer - Infineon Tech., Munich, Germany
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| | Author(s): | Christian Sauer - Infineon Tech., Munich, Germany
Matthias C. Gries - Infineon Tech., Munich, Germany
Soeren Sonntag - Infineon Tech., Munich, Germany
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| | 15.3 | Simulation Based Deadlock Analysis for System Level Designs |
| | Speaker(s): | Xi Chen - Univ. of California, Riverside, CA
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| | Author(s): | Xi Chen - Univ. of California, Riverside, CA
Abhijit Davare - Univ. of California, Berkeley, CA
Harry Hsieh - Univ. of California, Riverside, CA
Alberto Sangiovanni-Vincentelli - Univ. of California, Berkeley, CA
Yosinori Watanabe - Cadence Berkeley Labs, Berkeley, CA
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| | 15.4s | Fault and Energy-Aware Communication Mapping with Guaranteed Latency for Applications Implemented on NoC |
| | Speaker(s): | Sorin Manolache - Linkoping Univ., Linkoping, Sweden
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| | Author(s): | Sorin Manolache - Linkoping Univ., Linkoping, Sweden
Petru Eles - Linkoping Univ., Linköping, Sweden
Zebo Peng - Linkoping Univ., Linköping, Sweden
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| | 15.5s | High Performance Computing on Fault-Prone Nanotechnologies: Novel Microarchitecture Techniques Exploiting Reliability-Delay Trade-offs |
| | Speaker(s): | Elias Mizan - Univ. of Texas, Austin, TX
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| | Author(s): | Andrey Zykov - Univ. of Texas, Austin, TX
Elias Mizan - Univ. of Texas, Austin, TX
Margarida Jacome - Univ. of Texas, Austin, TX
Gustavo de Veciana - Univ. of Texas, Austin, TX
Ajay Subramanian - Univ. of Texas, Austin, TX
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