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 |  WEDNESDAY, June 15, 2005, 8:30 AM - 10:00 AM | Room: 208AB |
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TOPIC AREA: SYSTEM-LEVEL DESIGN AND VERIFICATION (mixed tools and methods)
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SESSION 20
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| | Application Specific Architecture Design Tools
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| | Chair: Nikil Dutt - Univ. of California, Irvine, CA
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| | Organizers: Joachim Gerlach, Margarida Jacome
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| | This session addresses tools and methods to support design space exploration and specialization of embedded computing systems, critical towards achieving increasingly stringent performance and energy efficiency requirements. The first paper proposes an application source code micro-profiling approach for fast and accurate characterization of embedded applications during ASIP design. The second paper proposes physically-aware methods for simultaneous partitioning, scheduling, and placement of tasks on dynamically reconfigurable architectures. The third and fourth papers address fast early simulation taking advantage of evaluation reuse schemes and virtual synchronization techniques.
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| | 20.1 |
Fine-grained Application Source Code Profiling for ASIP Design
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| | Speaker(s): | Kingshuk Karuri - RWTH Aachen Univ., Aachen, Germany
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| | Author(s): | Kingshuk Karuri - RWTH Aachen Univ., Aachen, Germany
Mohammad Al Faruque - RWTH Aachen Univ., Aachen, Germany
Stefan Kraemer - RWTH Aachen Univ., Aachen, Germany
Rainer Leupers - RWTH Aachen Univ., Aachen, Germany
Gerd Ascheid - RWTH Aachen Univ., Aachen, Germany
Heinrich Meyr - RWTH Aachen Univ., Aachen, Germany
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| | 20.2 | Physically-aware HW-SW Partitioning for reconfigurable architectures with partial dynamic reconfiguration |
| | Speaker(s): | Sudarshan Banerjee - Univ. of California, Irvine, CA
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| | Author(s): | Sudarshan Banerjee - Univ. of California, Irvine, CA
Elaheh Bozorgzadeh - Univ. of California, Irvine, CA
Nikil Dutt - Univ. of California, Irvine, CA
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| | 20.3s | Performance Simulation Modeling for Fast Evaluation of Pipelined Scalar Processor by Evaluation Reuse |
| | Speaker(s): | Ho Young Kim - KAIST, Daejeon, South Korea
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| | Author(s): | Ho Young Kim - KAIST, Daejeon, South Korea
Tag Gon Kim - KAIST, Daejeon, South Korea
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| | 20.4s | Trace-Driven HW/SW Cosimulation Using Virtual Synchronization Technique |
| | Speaker(s): | Dohyung Kim - Seoul National Univ., Seoul, South Korea
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| | Author(s): | Dohyung Kim - Seoul National Univ., Seoul, South Korea
Youngmin Yi - Seoul National Univ., Seoul, South Korea
Soonhoi Ha - Seoul National Univ., Seoul, South Korea
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