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| WEDNESDAY, June 15, 2005, 2:00 PM - 4:00 PM | Room: 209AB | ||
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TOPIC AREA: LOGIC DESIGN AND TEST (mixed tools and methods) | ||
| SESSION 29 | |||
| Advances in Synthesis | |||
| Chair: David S. Kung - IBM Corp., Yorktown Heights, NY | |||
| Organizers: Leon Stok, Soha Hassoun | |||
| Reusable DFT IP modules can be created using a parameterized soft core generator. Integrated race condition and clock skew scheduling is performed using an efficient method. Leakage power and noise are increasingly important issues that must be addressed by logic synthesis. A unifying framework for modeling asynchronous pipelines allows systematic exploration of the design space. | |||
 29.1s |
Automatic Generation of Customized Discrete Fourier Transform IPs |
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| Speaker(s): | James C. Hoe - Carnegie Mellon Univ., Pittsburgh, PA | ||
| Author(s): | Grace Nordin - Carnegie Mellon Univ., Pittsburgh, PA Peter Milder - Carnegie Mellon Univ., Pittsburgh, PA James C. Hoe - Carnegie Mellon Univ., Pittsburgh, PA Markus Pueschel - Carnegie Mellon Univ., Pittsburgh, PA | ||
| 29.2s | Race-Condition-Aware Clock Skew Scheduling | ||
| Speaker(s): | Shih-Hsu Huang - Chung Yuan Christian Univ., Chung Li, Taiwan | ||
| Author(s): | Shih-Hsu Huang - Chung Yuan Christian Univ., Chung Li, Taiwan Yow-Tyng Nieh - Chung Yuan Christian Univ., Chung Li, Taiwan Feng-Pin Lu - Chung Yuan Christian Univ., Chung Li, Taiwan | ||
| 29.3 | Dynamic Supply Gating for Switching and Active Leakage Power Reduction | ||
| Speaker(s): | Swarup Bhunia - Purdue Univ., West Lafayette, IN | ||
| Author(s): | Swarup Bhunia - Purdue Univ., West Lafayette, IN Nilanjan Banerjee - Purdue Univ., West Lafayette, IN Qikai Chen - Purdue Univ., West Lafayette, IN Hamid Mahmoodi - Purdue Univ., West Lafayette, IN Kaushik Roy - Purdue Univ., West Lafayette, IN | ||
| 29.4 | Designing Logic Circuits for Probabilistic Computation in the Presence of Noise | ||
| Speaker(s): | Kundan Nepal - Brown Univ., Providence, RI | ||
| Author(s): | Kundan Nepal - Brown Univ., Providence, RI Iris Bahar - Brown Univ., Providence, RI Joseph Mundy - Brown Univ., Providence, RI William R. Patterson - Brown Univ., Providence, RI Alexander Zaslavsky - Brown Univ., Providence, RI | ||
| 29.5 | A Lattice-Based Framework for the Classification and Design of Asynchronous Pipelines | ||
| Speaker(s): | Peggy B. McGee - Columbia Univ., New York, NY | ||
| Author(s): | Peggy B. McGee - Columbia Univ., New York, NY Steven M. Nowick - Columbia Univ., New York, NY | ||
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