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 |  WEDNESDAY, June 15, 2005, 4:30 PM - 6:30 PM | Room: 210CD |
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TOPIC AREA: DESIGN FOR MANUFACTURING (mixed tools and methods)
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SESSION 32
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| | Impact of Process Variations on Power
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| | Chair: Sunil Khatri - Texas A&M Univ., College Station, TX
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| | Organizers: Naehyuck Chang, Chaitali Chakrabarti
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| | In this session, there are four papers that examine the impact of process variations on power. The first paper computes the full chip leakage power under process variations considering intra-die, inter-die variations and spatial correlations. The second paper examines a design of a low-power parallel system based on voltage scaling considering within-die variations and temperature fluctuations. The correlation between delay and power is the subject of the third paper. Finally, the fourth paper presents a convex optimization procedure to find the exact minimum leakage considering process variations.
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| | 32.1 |
Full-Chip Analysis of Leakage Power Under Process Variations, Including Spatial Correlations
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| | Speaker(s): | Hongliang Chang - Univ. of Minnesota, Minneapolis, MN
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| | Author(s): | Hongliang Chang - Univ. of Minnesota, Minneapolis, MN
Sachin S. Sapatnekar - Univ. of Minnesota, Minneapolis, MN
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| | 32.2 | Variations-Aware Low-Power Design with Voltage Scaling |
| | Speaker(s): | Navid Azizi - Univ. of Toronto, Toronto, Canada
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| | Author(s): | Navid Azizi - Univ. of Toronto, Toronto, Canada
Muhammad M. Khellah - Intel Corp., Hillsboro, OR
Vivek De - Intel Corp., Hillsboro, OR
Farid N. Najm - Univ. of Toronto, Toronto, Canada
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| | 32.3 | Accurate and Efficient Parametric Yield Estimation Considering Correlated Variations in Leakage Power and Performance |
| | Speaker(s): | Ashish Srivastava - Univ. of Michigan, Ann Arbor, MI
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| | Author(s): | Ashish Srivastava - Univ. of Michigan, Ann Arbor, MI
Saumil S. Shah - Univ. of Michigan, Ann Arbor, MI
Kanak B. Agarwal - Univ. of Michigan, Ann Arbor, MI
Dennis M. Sylvester - Univ. of Michigan, Ann Arbor, MI
David Blaauw - Univ. of Michigan, Ann Arbor, MI
Stephen Director - Univ. of Michigan, Ann Arbor, MI
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| | 32.4 | Leakage Minimization of Nano-scale Circuits in the Presence of Systematic and Random Variations |
| | Speaker(s): | Sarvesh Bhardwaj - Arizona State Univ., Tempe, AZ
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| | Author(s): | Sarvesh Bhardwaj - Arizona State Univ., Tempe, AZ
Sarma B. Vrudhula - Arizona State Univ., Tempe, AZ
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