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WEDNESDAY, June 15, 2005, 4:30 PM - 6:30 PM | Room: 209AB
TOPIC AREA:  EMBEDDED SYSTEMS (mixed tools and methods)

   SESSION 34
  Architectural Support for Communication
  Chair: Petru Eles - Linkoping University, Linkoping, Sweden
  Organizers: Marcello Coppola, Peter Marwedel

  Communication is quickly becoming one of the most important problems in high-performance and system-on-chip designs. The first two papers present hardware to reduce snooping in MPSoC and adaptivity support. The third paper is on floorplan aware synthesis of communication architectures. Finally, the last two propose architectures for dynamic topology and traffic shaping.

    34.1   Cache Coherence Support for Non-shared Bus Architecture on Heterogeneous MPSoCs
  Speaker(s): Taeweon Suh - Georgia Institute of Tech., Atlanta, GA
  Author(s): Taeweon Suh - Georgia Institute of Tech., Atlanta, GA
Hsien-Hsin S. Lee - Georgia Institute of Tech., Atlanta, GA
Daehyun Kim - Intel Corp., Santa Clara, CA
    34.2A Low-Latency Router Supporting Adaptivity for On-Chip Interconnects
  Speaker(s): N. Vijaykrishnan - Pennsylvania State Univ., University Park, PA
  Author(s): Jongman Kim - Pennsylvania State Univ., University Park, PA
Dongkook Park - Pennsylvania State Univ., University Park, PA
Theocharis G. Theocharides - Pennsylvania State Univ., University Park, PA
N. Vijaykrishnan - Pennsylvania State Univ., University Park, PA
Chita R. Das - Pennsylvania State Univ., University Park, PA
    34.3Floorplan-aware Automated Synthesis of Bus-based Communication Architectures
  Speaker(s): Sudeep Pasricha - Univ. of California, Irvine, CA
  Author(s): Sudeep Pasricha - Univ. of California, Irvine, CA
Nikil Dutt - Univ. of California, Irvine, CA
Elaheh Bozorgzadeh - Univ. of California, Irvine, CA
Mohamed Ben-Romdhane - Conexant Systems Inc., Newport Beach, CA
    34.4sFLEXBUS: A High-Performance System-on-Chip Communication Architecture with a Dynamically Configurable Topology
  Speaker(s): Krishna Sekar - Univ. of California at San Diego, La Jolla, CA
  Author(s): Krishna Sekar - Univ. of California at San Diego, La Jolla, CA
Kanishka Lahiri - NEC-Labs America, Inc., Princeton, NJ
Anand Raghunathan - NEC-Labs America, Inc., Princeton, NJ
Sujit Dey - Univ. of California at San Diego, La Jolla, CA
    34.5sTraffic Shaping for an FPGA based SDRAM Controller with Complex QoS Requirements
  Speaker(s): Sven Heithecker - Technical Univ. of Braunschweig, Braunschweig, Germany
  Author(s): Sven Heithecker - Technical Univ. of Braunschweig, Braunschweig, Germany
Rolf Ernst - Technical Univ. of Braunschweig, Braunschweig, Germany