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THURSDAY, June 16, 2005, 2:00 PM - 4:00 PM | Room: 210AB
TOPIC AREA:  PHYSICAL CIRCUIT DESIGN (tools)

   SESSION 48
  Electrical Optimization for Physical Synthesis
  Chair: Gi-Joon Nam - IBM, Austin, TX
  Organizers: Patrick Groeneveld, Phiroze Parakh

  This session deals with novel power and delay optimization techniques in placement. The first paper presents a method that that reduces power by clustering registers. The following paper performs placement using a new differential timing analysis model. The final two papers both attack the optimization through novel analytical methods.



    48.1   Power Aware Placement
  Speaker(s): Qinke Wang - Univ. of California at San Diego, La Jolla, CA
  Author(s): Yongseok Cheon - Synopsys, Inc., Hillsboro, OR
Pei-Hsin Ho - Synopsys, Inc., Portland, OR
Andrew B. Kahng - Univ. of California at San Diego, La Jolla, CA
Sherief Reda - Univ. of California at San Diego, La Jolla, CA
Qinke Wang - Univ. of California at San Diego, La Jolla, CA
    48.2How Accurately Can We Model Timing in A Placement Engine?
  Speaker(s): Amit Chowdhary - Intel Corp., Santa Clara, CA
  Author(s): Amit Chowdhary - Intel Corp., Santa Clara, CA
Karthik Rajagopal - Intel Corp., Santa Clara, CA
Satish Venkatesan - Intel Corp., Santa Clara, CA
Tung Cao - Intel Corp., Santa Clara, CA
Vladimir Tiourin - Intel Corp., Santa Clara, CA
Yegna Parasuram - Sierra Design Automation, Inc., Santa Clara, CA
Bill Halpin - Synplicity, Inc., Sunnyvale, CA
    48.3Efficient and Accurate Gate Sizing with Piecewise Convex Delay Models
  Speaker(s): Hiran K. Tennakoon - Univ. of Washington, Seattle, WA
  Author(s): Hiran K. Tennakoon - Univ. of Washington, Seattle, WA
Carl Sechen - Univ. of Washington, Seattle, WA
    48.4Freeze: Engineering a Fast Repeater Insertion Solver for Power Minimization Using the Ellipsoid Method
  Speaker(s): Xun Liu - North Carolina State Univ., Raleigh, NC
  Author(s): Yuantao Peng - North Carolina State Univ., Raleigh, NC
Xun Liu - North Carolina State Univ., Raleigh, NC