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| THURSDAY, June 16, 2005, 4:30 PM - 6:00 PM | Room: 209AB | ||
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TOPIC AREA: LOGIC DESIGN AND TEST (methods) | ||
| SESSION 54 | |||
| New Directions in FPGA Technologies | |||
| Chair: Andre DeHon - California Institute of Technology, Pasadena, CA | |||
| Organizers: Jens Palsberg, Ryan Kastner | |||
| Scaling trends require new ideas to keep up with the relentless pace of Moore's Law. This session presents both new device technologies and innovations for existing fabrics. | |||
 54.1 |
Flexible ASIC: Shared Masking for Multiple Media Processors |
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| Speaker(s): | Jennifer L. Wong - Univ. of California, Los Angeles, CA | ||
| Author(s): | Jennifer L. Wong - Univ. of California, Los Angeles, CA Farinaz Koushanfar - Univ. of California, Berkeley, CA Miodrag Potkonjak - Univ. of California, Los Angeles, CA | ||
| 54.2 | Device and Architecture Co-Optimization for FPGA Power Reduction | ||
| Speaker(s): | Lerong Cheng - Univ. of California, Los Angeles, CA | ||
| Author(s): | Lerong Cheng - Univ. of California, Los Angeles, CA Phoebe Wong - Univ. of California, Los Angeles, CA Fei Li - Univ. of California, Los Angeles, CA Yan Lin - Univ. of California, Los Angeles, CA Lei He - Univ. of California, Los Angeles, CA | ||
| 54.3 | Exploring Technology Alternatives for Nano-Scale FPGA Interconnects | ||
| Speaker(s): | Aman Gayasen - Pennsylvania State Univ., University Park, PA | ||
| Author(s): | Aman Gayasen - Pennsylvania State Univ., University Park, PA Vijaykrishnan Narayanan - Pennsylvania State Univ., University Park, PA Mary Jane Irwin - Pennsylvania State Univ., University Park, PA | ||
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