Streamlined Integrated Design Systems are essential to meet today's business demands. The era of "point tools" linked by files is long over. Custom chip designers struggle to integrate growing numbers of macros while insuring manufacturability. ASIC and SoC designers must optimize many factors simultaneously to achieve "Design Closure." Product designers are exploring 3DIC and SiP to fully exploit chip and package synergy and remain competitive. Attend this workshop learn how Integrated System Design can work for you.
Organizers:
John Darringer, IBM Corp.
Rahul Goyal, Intel Corp.
Scott Peterson, LSI Logic Corp.
Alva Barney, Hewlett-Packard Co.
12:00 Lunch
1:00 Welcome - Chair: John Darringer Research Manager, IBM Corp.
1:20 User Views - Chair: Alva Barney, CAD Manager, Hewlett-Packard Co.
Four 10-minute talks by design system managers describing how they have solved tough integration problems for high-performance custom design as well as mixed signal designs, and what they think of the most important challenges ahead.
* Siva Yerramilli, Dir. Design Technology, Intel Corp.
* David Kung, Sr. Manager, Design Automation, IBM Corp.
* Lambert van den Hoven, VP and GM Design Technology, Philips Semiconductors
* Yoshio Inoue, Group Manager EDA Methodology, Renesas Technology Corp.
2:10 Vendor Views Chair: Rahul Goyal, Dir. EDA Business, Intel Corp.
Five 8-minute talks from EDA companies (large and small) describing how they have solved tough integration problems and what they think of the most important challenges ahead.
* Aurangzeb Khan, Corporate VP and GM, Design Foundries, Cadence Design Systems, Inc.
* Eshel Haritan, VP Engineering, CoWare, Inc.
* Premal Buch, GM Design Implementation, Magma Design Automation
* Greg Hackney, Program Manager Strategic Partnerships, Mentor Graphics Corp.
* Rich Goldman, VP Strategic Market Development, Synopsys, Inc.
3:00 Other Views Chair: Scott Peterson, Dir. Rapid Chip Methodology, LSI Logic Corp.
Four 10-minute talks from Universities, Standards Groups and Industry gurus describing their efforts and views of design system integration.
* Gary Smith, Chief Analyst, Gartner Dataquest
o The Automation of RTL Design
* Steve Schulz, CEO, Si2, Inc.
o How Standards Can Help
* Andreas Kuehlmann, Director, Cadence Berkeley Labs
o University Research on Integrated Design Systems
* Jim Solomon, CEO, Xulu Entertainment
o The Role of Start-ups
3:50 Break
4:10 PANEL: What's Next? Chair: Richard Goering, Editor, EE Times
An interactive session with the speakers above with the audience discussing the most important challenges facing our industry and the steps that need to be taken to address them.
5:00 Adjourn
Streamlined Integrated Design Systems are essential to meet today's business demands. The era of "point tools" linked by files is long over. Custom chip designers struggle to integrate growing numbers of macros while insuring manufacturability. ASIC and SoC designers must optimize many factors simultaneously to achieve "Design Closure." Product designers are exploring 3DIC and SiP to fully exploit chip and package synergy and remain competitive. Attend this workshop learn how Integrated System Design can work for you.