|
|
|
||||||||
|
|
|
|
|||||||
|
|
|
|
|
|
|
|
|||
|
|
|
||||||||
|
|
|
|
|
|
|
|
|
|
|
Search or browse RESULTS for: SESSION 30 COPING WITH BUFFERING | |
| 30.3 Path Based Buffer Insertion | ||
| Author(s): | Cliff C.N. Sze, Charles J. Alpert, Jiang Hu, Weiping Shi | |
| Speaker(s): | Cliff C.N. Sze | |
| SESSION DESCRIPTION: This session introduces novel methods for economical buffer insertion. The first paper presents dual-Vdd buffer tree construction for power minimization under delay constraints. The next two papers focus on minimizing the overall number of repeaters in a circuit. The fourth paper resolves overlaps between repeaters and pre-existing cells. |