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	THURSDAY, June 16, 2005, 09:00 AM - 12:00 PM \| Room: 211AB TRACK:EMBEDDED SYSTEMS
	HoT Core-based SoC Design
	Virtual System Prototypes for Core-Based SoC Design (VaST Systems Technology and StarCore, LLC)
	The Crisis in complex SoC and embedded systems design can be substantially helped by moving to the use of virtual system prototypes. Virtual system prototypes are software simulation-based models of electronic systems and SoCs that are used for the development and evaluation of the system architecture, software development and hardware verification. A virtual prototype can include one or more processors, buses, hardware peripheral components, and even models of mechanical subsystems that are part of the overall system. The virtual prototype runs the same compiled and linked target code as does the real or prototype hardware, accurately predicting the system's real-world behavior. In addition, the virtual system prototype is cycle-accurate so that the model accurately portrays real-time, critical control system behavior. In this hands on tutorial session participants will learn how a virtual system prototype is created and then used to enable architectural exploration and a truly concurrent development process for hardware and software in which both are tightly linked back to architectural specification and system-level validation. The heart of a Virtual System Prototype is the virtual processor model. StarCore and Vast have worked together to create a high-performance, cycle-accurate software model of the StarCore SC1200 processor core, which includes the cache subsystem. Participants in the session will be introduced to, and will begin to use, design methods and tools using the StarCore processor model with VaST's electronic system level (ESL) design tools. We will demonstrate how this enables designers to test and validate software such as RTOSs, drivers and applications, long before actual silicon is available. Participants will learn how a VaST model of the StarCore SC1200 processor core can be integrated in a reference model for system-on-chip (SoC) design, and how it can be used as the central component of a pre-silicon virtual prototype that engineers use to develop and tune embedded software.