1 PANEL: Differentiate and Deliver: Leveraging Your Design and Manufacturing
2 Special Session: Error-Tolerant Design
3 Microarchitecture-Level Power Analysis and Optimization Techniques
4 Leakage Analysis and Optimization
5 Analog Macromodeling
6 PANEL: ESL: Tales From the Trenches
7 Statistical Timing Analysis
8 Embedded Software
9 Advances in Design-for-Testability Methods
10 Advances in Boundary Element Methods for Parasitic Extraction
11 PANEL: DFM Rules!
12 Recent Advances in Signal Integrity
13 Physical Considerations in High-Level Synthesis
14 Architectures for Cryptography and Security Applications
15 Performance, Energy, and Fault-Tolerance Considerations for MPSoC Designs
16 Special Session: Closing the Power Gap Between ASIC and Custom
17 PANEL: My Giga Hertz: Does Yours?
18 Wireless Session: Information Design Methodology
19 Statistical Optimization and Manufacturability
20 Application Specific Architecture Design Tools
21 Special Session: The Titanic: What Went Wrong
22 PANEL: Wireless Platforms: GOPS for Cents and MilliWatts
23 Design Methods for Manufacturability Enhancements
24 Methods and Representations for Logic Synthesis
25 Generating Efficient Models for Analog Circuits
26 Special Session: Emerging Directions in Wireless
27 CAD for FPGAs
28 Effective Formal Verification Using Word-level Reasoning, Bit-level General
29 Advances in Synthesis
30 Coping with Buffering
31 PANEL: Is Methodology the Highway Out of Verification Hell?
32 Impact of Process Variations on Power
33 Special Session: The Best of Wireless at ISSCC
34 Architectural Support for Communication
35 New Approaches to Physical Design Problems
36 Special Session: MATLAB TM - The Other Emerging System-Design Language
37 PANEL: Should Our Power Approach Be Current?
38 Emerging Ideas in Energy Management Techniques
39 Advances in Optimization of Mixed-signal Circuits
40 Circuit Performance Under Parameter Variation
41 Special Session: Formally Verifying Your 10-Million Gate Design
42 Embedded Hardware and System Software
43 Power Estimation and Design Tradeoffs
44 Programmable Architectures
45 SAT: Cool Algorithms and Hot Applications
46 Special Session: DFM and Variability: Theory and Practice
47 Tools and Methods for the Verification of Processors and Processor-Based Sy
48 Electrical Optimization for Physical Synthesis
49 Optimization Techniques in High-Level Synthesis
50 Testing for Process- and Timing-Related Faults
51 Special Session: Hierarchical Design and Design Space Exploration of Analog
52 PANEL: Platform ASIC Apprentices: Who Will Survive Your Boardroom?
53 Dynamic Voltage Scaling
54 New Directions in FPGA Technologies
55 Reduced-Order Modeling
100 Choosing Flows and Methodologies for SoC Design
150 How to Determine the Necessity for Emerging Solutions

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