Conference Program    Workshop

SUNDAY, July 23, 2006, 09:00 AM - 06:00 PM | Room:302
TRACK:SYSTEM LEVEL AND EMBEDDED

  WORKSHOP
  UML for SoC Design Workshop

  Organizer(s): Y. Vanderperren, J. Wolfe

  

The program of the third workshop on the Unified Modeling LanguageTM (UML) for System-on-a-Chip (SoC) design includes papers from design teams and researchers around the globe. UML is attracting growing interest as a system level visual language to support the tasks of specifying, analyzing, designing, and verifying SoCs. The UML for SoC Design Workshop is meant to coordinate efforts, to initiate discussions, and to exchange experiences/information related to UML applied to SoC design and hardware aspects. A keynote by Dr. Sreeranga Rajan, Chair of the UML-SoC profile Standardization Committee at the Object Management Group™ (OMG), will open the workshop and provide the latest information about this standard extension to UML for SoC development. Other presentations will explore embedded system analysis, design, modeling, synthesis, and design flows supported by UML. The workshop is open to anyone interested in learning more about UML for SoC Design.

9:00 Welcome and Introduction by the Workshop Organizers

9:15 Keynote:
UML for SoC: Where, When, and How?
Sreeranga P. Rajan - Chair of the UML4SoC Standardization Committee, Fujitsu Labs, Sunnyvale, CA

Session 1: Systems Modeling with UML
9:45 UML Modeling and Configuration of Tile Based Networks-on-Chip
Subhek Garg, Marcello Lajolo - NEC, Princeton, NJ
10:15 UML-Based Modeling of Time-triggered Applications
Kathy Dang Nguyen, Geoffrey Koh, P.S. Thiagarajan, Weng-Fai Wong - Univ. of Singapore, Singapore

10:45 Coffee break

Session 2: UML-based SoC Design Space Exploration
11:00 Multi-objective Design Space Exploration Based on UML
Marcio F. da S. Oliveira, Eduardo Brião, Francisco Nascimento, Lisane Brisolara, Luigi Carro, Flávio Wagner - Federal Univ. of Rio Grande do Sul, Porto Alegre, Brazil
11:30 A UML-Based Design Flow and Partitioning Methodology for Dynamically Reconfigurable Systems
Chih-Hao Tseng, Pao-Ann Hsiung - National Chung-Cheng Univ., Taiwan, Republic of China
12:00 Design Space Exploration Through Interactive Model Mappings for UML-based Specifications
Tim Schattkowsky, Achim Rettberg, Rainer Doemer - C-LAB, Paderborn, Germany; Paderborn Univ. of Paderborn, Germany; Univ. of California, Irvine, CA

12:30 Lunch

Session 3: UML and SoC Languages
2:00 Automatic Generation of Verification Properties for SoC Design from SysML-Diagrams
Stefan Laemmermann, Roland Weiss, Juergen Ruf, Thomas Kropf, Wolfgang Rosenstiel - Univ. of Tuebingen, Germany
2:30 SoC, UML & MDA - An Investigation
Maha Ramanan - Philips Semiconductors, Southampton, UK
3:00 A SoC Design Flow Based on UML 2.0 and SystemC
Alberto Rosti, Sara Bocchio, Elvinia Riccobene, Patrizia Scandurra - STMicroelectronics, Milano, Italy; Univ. of Milano, Milano, Italy; Univ. of Catania, Catania, Italy

3:30 Coffee break & tool demos

Session 4: Models of Computations and UML for SoC
4:00 Stereotyping for Register-level SoC Custom Logic Kernel Design: Integrating Algorithmic State Machines into UML
James P. Davis, Achraf El Allali, Bryan D. Young, Salman Ali - Univ. of South Carolina, Columbia, SC
4:30 Towards a Unified Behavioral Language
Wolfgang Mueller, Henning Zabel, C-LAB, Paderborn, Germany

Session 5
5:00 Workshop Discussion: Challenges with UML-Based SoC Design and State-of-the-Art Solution - moderated by the Organizers

6:00 Workshop Wrap-up