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Conference Program  HOT
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MONDAY, July 24, 2006, 09:00 AM - 12:00 PM | Room:309
TRACK:LOW POWER AND THERMAL
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| | Hands-on Tutorial
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| | Analysis and Optimization of Low Power Designs - Presented by Apache Design Solutions, Inc.
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| | As designs move to deep-sub-micron technologies, lowered supply voltage, reduced noise margins, and increasing leakage power necessitates extensive verification and analyses prior to tape-out. This tutorial provides hands-on experience in analysis and optimization of designs utilizing power-gating (MTCMOS) technology, a common low-power design technique for leakage control. The tutorial will use RedHawk-LP, Apache's full-chip dynamic power sign-off solution for low-power designs, to accurately analyze the behavior of their power-gated designs, including full-chip power-up and mixed-mode analysis. You will explore and determine the ideal timing intervals for ramp-up, as well as add or remove power-gating switches for optimal design performance. The tutorial will discuss the different operating modes of a power-gated design, and how a block transitioning from one state to another impacts the performance of other blocks in the design. In this tutorial, you will gain the hands-on experience needed to better understand and manage your low-power designs.
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