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TUESDAY, July 25, 2006, 4:30 PM - 6:30 PM | Room: 301 |
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TOPIC AREA: BUSINESS
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SESSION 150
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| | Tradeoffs and Choices for Emerging SoCs in High-End Applications
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| | Chair: David Bursky - EE Times, Manhasset, NY
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| | Organizers: Yervant Zorian
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| | Design and manufacturing flows and methodologies are directly impacted by the demand for emerging SoCs with increasing performance and parallelism. Moving to new semiconductor technology nodes can significantly affect the choices of suppliers. This session will provide an overview of changing needs and corresponding management decision criteria to make the right choices from a pool of alternate options for flows, methodologies and suppliers.
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| | 150.1 |
Assessing Process Nodes and IP for SoC Development
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| | Speaker(s): | Ken Wagner - PMC-Sierra, Inc., Burnaby, BC, Canada
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| | 150.2 | Open-IP: How Your Selection of IP Drives Your ASIC Success |
| | Speaker(s): | Rajesh Shah - Open-Silicon, Milpitas, CA
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| | 150.3 | Yield, Manufacturability and Test: The Criteria to Judge the Right Design Investment |
| | Speaker(s): | Rajesh Galivanche - Intel Corp., Santa Clara, CA
Kee Sup Kim - Intel Corp., Folsom, CA
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| | 150.4 | Management Day Cocktail Party |
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Technical Session
