Conference Program    Technical Session

WEDNESDAY, July 26, 2006, 8:30 AM - 10:00 AM | Room: 306-308
TOPIC AREA:  SYSTEM LEVEL AND EMBEDDED


   SESSION 16
  Special Session: MPSoC Design Tools
  Chair: Pierre Paulin - STMicroelctronics, Nepean, Canada
  Organizers: Sumit Gupta

  This session discusses the problems associated with the design and verification of SoCs that have instantiations of multiple processors and the requirements that this places on software tools. We will discuss issues pertaining to system-level modeling and application partitioning and mapping as it pertains to the challenges faced by MPSoC designers. Specifically, we will present the problems faced by MPSoC designers and why and how these problems are unique to multi-processor systems. We will discuss issues related to real-time operating system (RTOS) requirements, application partitioning, inter-processor communication, multi-processor design, et cetera. We will follow this with how software design tools can help alleviate some of these problems, what parts of the design flow can be fully automated, and what parts can be aided by design tools. We will also discuss the state of design tools in the industry and academia today and what pieces of the puzzle are missing.

  16.1   Overview of the MPSoC Design Challenge
  Speaker(s): Grant E. Martin - Tensilica, Inc., Santa Clara, CA
  Author(s): Grant E. Martin - Tensilica, Inc., Santa Clara, CA
  16.2  Programming Models and HW-SW Interfaces Abstraction for Multi-Processor SoC
  Speaker(s): Ahmed A. Jerraya - TIMA/CNRS, Grenoble, France
  Author(s): Ahmed A. Jerraya - TIMA/CNRS, Grenoble, France
Frederic Petrot - TIMA/INPG, Grenoble, France
Aimen Bouchhima - TIMA, Grenoble, France
  16.3  System-Level Exploration Tools for MPSoC Designs
  Speaker(s): Peter Flake - Imperas, Inc., Palo Alto, CA
  Author(s): Simon Davidmann - Imperas, Inc., Palo Alto, CA
Peter Flake - Imperas, Inc., Palo Alto, CA
Frank Schirrmeister - Imperas, Inc., Palo Alto, CA