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Conference Program Technical Session
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 |  TUESDAY, July 25, 2006, 10:30 AM - 12:00 PM | Room: 307 |
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TOPIC AREA: SYSTEM LEVEL AND EMBEDDED (of special interest to designers)
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SESSION 2
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| | Special Session: Why Doesn't My System Work?
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| | Chair: Bart Vermeulen - Philips Research, Eindhoven, Netherlands
| | | Organizers: Erik Jan Marinissen
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| | Industry data shows that over 60% of complex chip design projects do require one or more respins, and that silicon debug has become the most time-consuming part of the development cycle of a new SoC. In this special session, industry experts discuss the in-system silicon debug problem and emerging solutions for it. The first speaker talks from the perspective of a design/debug engineer, with a host of experience of debugging actual microprocessor products. The second speaker discusses on-chip design-for-debug hardware required to create access to chip-internal signals. The third speaker describes the software that helps the debug process by visualization and translation to higher levels.
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| | 2.1 |
The Good, the Bad, and the Ugly of Silicon Debug
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| | Speaker(s): | Doug Josephson - Intel Corp., Fort Collins, CO
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| | Author(s): | Doug Josephson - Intel Corp., Fort Collins, CO
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| | 2.2 | A Reconfigurable Design-for-Debug Infrastructure for SoCs |
| | Speaker(s): | Miron Abramovici - DAFCA Inc., Framingham, MA
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| | Author(s): | Miron Abramovici - DAFCA Inc., Framingham, MA
Paul Bradley - DAFCA Inc., Framingham, MA
Kumar Dwarakanath - DAFCA Inc., Framingham, MA
Peter Levin - DAFCA Inc., Framingham, MA
Gerard Memmi - DAFCA Inc., Framingham, MA
Dave Miller - DAFCA Inc., Framingham, MA
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| | 2.3 | Visibility Enhancement for Silicon Debug |
| | Speaker(s): | Yu-Chin Hsu - Novas Software, Inc., San Jose, CA
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| | Author(s): | Yu-Chin Hsu - Novas Software, Inc., San Jose, CA
Furshing Tsai - Novas Software, Inc., San Jose, CA
Wells Jong - Novas Software, Inc., San Jose, CA
Ying-Tsai Chang - Novas Software, Inc., San Jose, CA
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