Conference Program    Technical Session

WEDNESDAY, July 26, 2006, 10:30 AM - 12:00 PM | Room: 307
TOPIC AREA:  MEGA
(of special interest to designers)

   SESSION 23
  Invited Session: CAD Challenges for Leading-Edge Multimedia Designs
  Chair: Andrew B. Kahng - Univ. of California at San Diego, La Jolla, CA
  Organizers: Andrew B. Kahng

  Multimedia designs are among the most complex leading-edge integrated circuits that are made today. In this session, CAD architects for three industry-leading multimedia products will discuss new challenges that arise across the CAD flow - from system and architecture level through physical implementation - as we approach billion-transistor devices. The first talk will focus on system-level specification and codesign of embedded software for a multimedia processor. The second talk will discuss new time and space challenges for verification methodologies, which must be met to address the requirements of graphics processor time-to-market pressures. The third talk will discuss CAD challenges unique to a pioneering high-speed, multi-core processing engine for gaming and entertainment platforms.

  23.1   Addressing the Challenge of Low Power, High Performance and Scalable Multimedia Acceleration in the Nomadik Processor
  Speaker(s): Patrick Blouet - STMicroelectronics, Crolles, France
  Author(s): Patrick Blouet - STMicroelectronics, Crolles, France
  23.2  Next-Generation Multimedia Designs: Verification Needs
  Speaker(s): Ira Chayut - NVIDIA, Santa Clara, CA
  Author(s): Ira Chayut - NVIDIA, Santa Clara, CA
  23.3  CAD Challenges for Designing a High Frequency Multi-Core SoC Implementation of a First-Generation CELL Processor
  Speaker(s): Neeraj Paliwal - IBM Corp., Austin, TX
  Author(s): Dac Pham - IBM Corp., Austin, TX
Neeraj Paliwal - IBM Corp, Austin, TX