Conference Program    Technical Session

THURSDAY, July 27, 2006, 8:30 AM - 10:00 AM | Room: 307
TOPIC AREA:  NEW AND EMERGING TECHNOLOGIES


   SESSION 41
  Nanotubes and Nanowires
  Chair: Sankar Basu - NSF, Arlington, United States
  Organizers: Igor Markov, Krishnendu Chakrabarty

  Nanotechnology holds promise for higher device densities and lower fabrication costs. This session covers analysis of ballistic CNFETs, design of reconfigurable nano-CMOS, as well as crossbar-based nano-FPGAs.

  41.1   NATURE: A Hybrid Nanotube/CMOS Dynamically Reconfigurable Architecture
  Speaker(s): Wei Zhang - Princeton Univ., Princeton, NJ
  Author(s): Wei Zhang - Princeton Univ., Princeton, NJ
Niraj K. Jha - Princeton Univ., Princeton, NJ
Li Shang - Queen's Univ., Kingston, ON
  41.2  Modeling and Analysis of Circuit Performance of Ballistic CNFET
  Speaker(s): Bipul C. Paul - Stanford Univ., Stanford, CA
  Author(s): Bipul C. Paul - Stanford Univ., Stanford, CA
Shinobu Fujita - Toshiba Corp., San Jose, CA
Masaki Okajima - Toshiba Corp., San Jose, CA
Thomas Lee - Stanford Univ., Stanford, CA
  41.3s  Topology Aware Mapping of Logic Functions onto Nanowire-based Crossbar Architectures
  Speaker(s): Wenjing Rao - Univ. of California at San Diego, La Jolla, CA
  Author(s): Wenjing Rao - Univ. of California at San Diego, La Jolla, CA
Alex Orailoglu - Univ. of California at San Diego, La Jolla, CA
Ramesh Karri - Polytechnic Univ., Brooklyn, NY
  41.4s  A New Hybrid FPGA With Nanoscale Clusters and CMOS Routing
  Speaker(s): Mohammad Tehranipoor - Univ. of Maryland, Baltimore, MD
  Author(s): Reza M. Rad - Univ. of Maryland, Baltimore, MD
Mohammad Tehranipoor - Univ. of Maryland, Baltimore, MD