Conference Program    Technical Session

THURSDAY, July 27, 2006, 2:00 PM - 4:00 PM | Room: 303
TOPIC AREA:  BEYOND THE DIE
(of special interest to designers)

   SESSION 56
  Beyond-the-Die Circuit and System Integration
  Chair: Shauki Elassaad - Emergent Design Solutions, Santa Clara, CA
  Organizers: John Berrie, Mike Heimlich

  The first two papers cover performance, power and temperature tradeoffs in 3D integrated circuit design, from architecture and circuit points of view. The third paper addresses efficient high-density escape routing. The final two papers are concerned with system-level high-speed signal and power integrity, including pre-emphasis and equalization analysis.

  56.1   A Thermally-Aware Performance Analysis of Vertically Integrated (3D) Processor-Memory Hierarchy
  Speaker(s): Banit Agrawal - Univ. of California, Santa Barbara, CA
  Author(s): Gian Luca Loi - Univ. of California, Santa Barbara, CA
Banit Agrawal - Univ. of California, Santa Barbara, CA
Navin Srivastava - Univ. of California, Santa Barbara, CA
Sheng-Chih Lin - Univ. of California, Santa Barbara, CA
Timothy Sherwood - Univ. of California, Santa Barbara, CA
Kaustav Banerjee - Univ. of California, Santa Barbara, CA
  56.2  Exploring Compromises Among Timing, Power and Temperature in Three-Dimensional Integrated Circuits
  Speaker(s): Rhett Davis - North Carolina State Univ., Raleigh, NC
  Author(s): Hao Hua - North Carolina State Univ., Raleigh, NC
Chris Mineo - North Carolina State Univ., Raleigh, NC
Kory Schoenfliess - North Carolina State Univ., Raleigh, NC
Ambarish Sule - North Carolina State Univ., Raleigh, NC
Samson Melamed - North Carolina State Univ., Raleigh, NC
Ravi Jenkal - North Carolina State Univ., Raleigh, NC
Rhett Davis - North Carolina State Univ., Raleigh, NC
  56.3  Efficient Escape Routing for Hexagonal Array of High Density I/Os
  Speaker(s): Rui Shi - Univ. of California at San Diego, La Jolla, CA
  Author(s): Rui Shi - Univ. of California at San Diego, La Jolla, CA
Chung-Kuan Cheng - Univ. of California at San Diego, La Jolla, CA
  56.4s  System Level Signal and Power Integrity Analysis Methodology for System-In-Package Applications
  Speaker(s): Krishna Bharath - Georgia Institute of Tech., Atlanta, GA
  Author(s): Rohan Mandrekar - Georgia Institute of Tech., Atlanta, GA
Krishna Bharath - Georgia Institute of Tech., Atlanta, GA
Krishna Srinivasan - Georgia Institute of Tech., Atlanta, GA
Ege Engin - Georgia Institute of Tech., Atlanta, GA
Madhavan Swaminathan - Georgia Institute of Tech., Atlanta, GA
  56.5s  PELE: Pre-Emphasis and Equalization Link Estimator to Address the Effects of Signal Integrity Limitations
  Speaker(s): William Bereza - Altera Corp., Kanata, ON
  Author(s): William Bereza - Altera Corp., Kanata, ON
Yuming Tao - Altera Corp., Kanata, ON
Shoujun Wang - Altera Corp., Kanata, ON
Rakesh Patel - Altera Corp., San Jose, CA
Tad Kwasniewski - Altera Corp., Kanata, ON