 | OA based automatic and semiautomatic transistor level analog IC design environment. Schematic-layout always synchronized. Devices and differential structures generated and updated. Manual routing has built-in DRC/LVS with automation assistance. Automatic router handles differential routing, lower capacitance, variable widths, multi via, etc. Layout provides schematic with parasitic values on the fly during the design for more accurate simulations. Testbenches/analysis built into the schematic. 45n supported.
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