This session will introduce the three CPU architecture variations found in the ARM® Cortex® Family, highlighting common traits and fundamental differences, and will be of interest to hardware engineers, software engineers and system architects wishing to learn more about ARM processor architecture. The session will discuss the programmers' model, exceptions, memory models and cache architecture and will look at system aspects such as multi-processing with an emphasis on cache coherency issues and interrupt distribution schemes.
This track is taught by Dr. David Cabanis, Senior Member,Technical Staff and ARM expert at Doulos and also Ronan Synnott, Select Core Competency FAE from ARM US, focused on ARM Development Tools.
The two sessions in this track follow the syllabus of the ARM Accredited Engineer Program, so will be of particular interest to anyone wishing to work toward the AAE exam.
Click here for more information about the AAE exam.
52nd DAC General Chair, Anne Cirkel, will be the featured editor of the "52 Weeks of DAC" blog. Follow this blog for a behind the scenes view of how this conference gets ready for June 2015!
DAC 2015 will be held in San Francisco, California, at the Moscone Center. Get details about travel, hotels, and area attractions in one convenient spot.