MONDAY June 06, 10:30am - 12:00pm | 19AB
TOPIC AREA: EDA, DESIGN
KEYWORD: TEST & VERIFICATION, SYSTEM SOFTWARE
EVENT TYPE: MONDAY TUTORIAL
Tutorial 4: Overcoming Challenges of FPGA Prototyping

Speakers:
Mon-Ren Chene - S2C, Inc., San Jose, CA
Bruno Bratti - Wave Computing, Campbell, CA
Allen Sha - M31 Technology Corp., Santa Clara, CA
Organizer:
Rob van Blommestein - S2C, Inc., San Jose, CA

Due to both simulation speed and modeling accuracy limitations, designers are increasingly finding it difficult to rely only on software simulations to verify that their hardware design is correct. Running your SoC design on a FPGA prototype is the most reliable way to ensure that your design is functionally correct.

Early software and/or firmware development on FPGA prototypes, pre-silicon, has become more important as many unforeseen software bugs stem from the complexity of integrating operating system (OS), applications, and hardware. An at-speed FPGA prototype allows for many extra months of rigorous software development and testing at the crucial software-hardware integration stage.

FPGA prototyping is also critical if your SoC design utilizes many commercial IPs making prototyping on FPGAs the most reliable method to ensure all these IPs work well together. FPGA prototypes can also be used as demo platforms to the SoC customers for getting them interested in the chip you build and allow you to work with them on improving features before chip tape-out. However, FPGA prototyping does come with some challenges: Long Bring-Up Time Performance Reusability Design Partitioning Debug-ability.

This tutorial will show how designers can address these challenges and utilize FPGA prototyping to reach success. Real-word case studies will be explored to exemplify specific ways how FPGA prototyping can be optimized.