KEYWORD: ARCHITECTURE & SYSTEM DESIGN, LOW POWER, INTERCONNECTS/NETWORKING
EVENT TYPE: MONDAY TUTORIAL
Tutorial 2: EDA Challenges of 3D Integration: Physical Layer to Manycore Chip Design
Sung-Kyu Lim - Georgia Institute of Technology, Atlanta, GA Gabriel Loh - Advanced Micro Devices, Inc., Bellevue, WA Partha Pande - Washington State Univ., Pullman, WA
Partha Pratim Pande - Washington State Univ., Pullman, WA
Three-dimensional (3D) integration) has frequently been described as a means to overcome scaling bottlenecks, and advance both “More Moore” and “More Than Moore” through the use of vertical interconnects and die/wafer stacking. Recent research has demonstrated advantages and challenged associated with silicon interposer-based 2.5D design. Emerging Monolithic 3D (M3D) integration offers the “true” benefits of vertical dimension for system integration: the size of a monolithic inter-tier via (MIV) is over 100x smaller than a Through-Silicon-Via (TSV) used in stacked 3D chips. From the computing system design perspective, 3D integration opens up new opportunities and challenges in heterogeneous manycore chip design. High-performance three-dimensional (3D) manycore platforms that incorporate both CPUs and GPUs present a promising direction for emerging big data applications. However, as systems use heterogeneity (e.g., a combination of CPUs, GPUs, and accelerators) to improve performance and efficiency, it becomes more pertinent to address the distinct and likely conflicting communication requirements (e.g., CPU memory access latency or GPU network throughput) that arise from such heterogeneity. This tutorial will articulate the challenges associated with 3D integration (physical layer design, memory architectures, networking, manycore chip design, etc.) that impede commercial exploitation, as well as highlight opportunities for deriving the maximum possible benefit from vertical integration. To address various challenges associated with 3D integration starting from the physical layer to heterogeneous system design various out-of-the-box approaches need to be explored. This tutorial brings together speakers from industry and academia with unique insights on design and optimization of 3D integration-enabled computing systems.