MONDAY June 03, 5:00pm - 6:00pm | Exhibit Floor
KEYWORD: ANY
EVENT TYPE: NETWORKING
Designer/IP Track Poster Networking Reception
During the poster presentation, you will interact directly with poster presenters in a small group setting.

As the limited time available in the Designer/IP Track session program was exceeded by the quantity of great submitted content, we present the following posters in the Designer/IP Track Poster Session held Monday, June 3 from 5:00 to 6:00pm on the Exhibit Floor.

Thank you to our Designer Track and IP Track Sponsors:


123.1Accurately Modeling ASIC Memories in FPGA-based Prototype Systems
 Speaker: Juergen Jaeger - Cadence Design Systems, Inc., San Jose, CA
 Author: Juergen Jaeger - Cadence Design Systems, Inc., San Jose, CA
123.2Signoff Abstarct Model (SAM) based Hierarchical Flow Verification using VC-LP
 Speaker: Nishant Patel - Synopsys, Inc., Mountain View, CA
 Authors: Susantha Wijesekara - Synopsys, Inc., Mountain View, CA
Chiragkumar D. Patel - Synopsys, Inc., Bengaluru, India
Nishant Patel - Synopsys, Inc., Mountain View, CA
123.3Rapid IP and SOC Power Dissipation Analysis by Leveraging Emulation
 Speaker: Hojin Jo - Samsung Electronics Co., Ltd. & Samsung Semiconductor, Inc., Hwaseong-si, Republic of Korea
 Authors: Hojin Jo - Samsung Electronics Co., Ltd. & Samsung Semiconductor, Inc., Hwaseong-si, Republic of Korea
Hyeongjin Kim - Samsung Electronics Co., Ltd. & Samsung Semiconductor, Inc., Whaseong-si, Republic of Korea
Jaewon Jeon - Samsung Electronics Co., Ltd. & Samsung Semiconductor, Inc., Whaseong-si, Republic of Korea
Hyunjae Woo - Samsung Electronics Co., Ltd. & Samsung Semiconductor, Inc., Gyeonggi-do, Republic of Korea
Changjun Choi - Samsung Electronics Co., Ltd. & Samsung Semiconductor, Inc., Whaseong-si, Republic of Korea
Youngsik Kim - Samsung Electronics Co., Ltd. & Samsung Semiconductor, Inc., Gyeonggi-do, Republic of Korea
Seonil B. Choi - Samsung Electronics Co., Ltd. & Samsung Semiconductor, Inc., Hwaseong-si, Republic of Korea
123.4Optimizing Threat Modelling to Create Robust IoT Security Solutions
 Speaker: Brian Clinton - Arm, Ltd., Dublin, Ireland
 Author: Brian Clinton - Arm, Ltd., Dublin, Ireland
123.5Early LVS - Paradigm Shift to LVS with Novel Methodology (LVS – Signoff Layout vs Schematic)
 Speaker: MuraliMohan Thota - Texas Instruments India Pvt. Ltd., Bengaluru, India
 Authors: Karthik Kodakandla - Texas Instruments India Pvt. Ltd., Bengaluru, India
MuraliMohan Thota - Texas Instruments India Pvt. Ltd., Bengaluru, India
123.6Optimizing Hardware/Software Development for ARM based Embedded Designs
 Speaker: Bill Neifert - Arm, Ltd., Acton, MA
 Authors: Bill Neifert - Arm, Ltd., Acton, MA
Frank Schirrmeister - Cadence Design Systems, Inc., San Jose, CA
123.7Systematic Power Routing Strategy To Meet Design Reliability Target for Ultra-low Power SoCs
 Speaker: Venkatraman Ramakrishnan - Texas Instruments India Pvt. Ltd.
 Authors: Apurve Chawda - Texas Instruments India Pvt. Ltd. & Texas Instruments, Inc., Bangalore, India
Vivek Joshi - Texas Instruments India Pvt. Ltd., Bangalore, India
Subhadeep Ghosh - Texas Instruments India Pvt. Ltd., Bangalore, India
Venkatraman Ramakrishnan - Texas Instruments India Pvt. Ltd.
123.8An Effective Method to Accelerate Timing ECO for Large Scale Hierarchical DVFS Design
 Speaker: Jincheng Wang - Unisoc Communications, Inc., Hangzhou, China
 Authors: Jincheng Wang - Unisoc Communications, Inc., Hangzhou, China
Xiao Yong - Huada Empyrean Software Co., Ltd, Beijing, China
Jianlin Li - Huada Empyrean Software Co., Ltd, Beijing, China
Senhua Dong - Huada Empyrean Software Co., Ltd, Beijing, China
123.9Get Higher Productivity and Smoother Tape-out by Smarter Disk Space Management
 Speaker: Jigar Savla - Juniper Networks, Inc. & Georgia Institute of Technology, Sunnyvale, CA
 Author: Jigar Savla - Juniper Networks, Inc. & Georgia Institute of Technology, Sunnyvale, CA
123.10(BlueChip) A Smarter EDA on the Cloud, using Machine Learning
 Speaker: Kerim Kalafala - IBM Corp., Hopewell Junction, NY
 Authors: Kerim Kalafala - IBM Corp., Hopewell Junction, NY
Steve Kurtz - IBM Corp., Austin, TX
Nicholai L'Esperance - IBM Corp., Burlington, VT
Adisun Wheelock - IBM Corp., Burlington, VT
123.11RTLarc – An RTL based Timing-arc Tool
 Speaker: Ankit K. Zalawadiya - Advanced Micro Devices, Inc., Bengaluru, India
 Authors: Ankit K. Zalawadiya - Advanced Micro Devices, Inc., Bengaluru, India
Hariprasad T. T - Advanced Micro Devices, Inc., Bangalore, India
123.12Fast and Accurate Moment LVF Characterization for Advanced Technology Nodes
 Speaker: Jongyoon Jung - Samsung Electronics Co., Ltd., Hwaseong-si, Republic of Korea
 Authors: Jongyoon Jung - Samsung Electronics Co., Ltd., Hwaseong-si, Republic of Korea
Hyun-seung Seo - Samsung Electronics Co., Ltd., Hwaseong-si, Republic of Korea
Naya Ha - Samsung Electronics Co., Ltd., Hwaseong-si, Republic of Korea
Cheoljun Bae - Samsung Electronics Co., Ltd., Hwaseong-si, Republic of Korea
Vinayakam Subramanian - ANSYS, Inc., Bangaluru, India
Krishnakanth Gilakamsetti - ANSYS, Inc., Bangaluru, India
123.14Timing Closure for an EFPGA IP Inside an SoC
 Speaker: Christopher Pelosi - Achronix Semiconductor Corp., Santa Clara, CA
 Authors: Christopher Pelosi - Achronix Semiconductor Corp., Santa Clara, CA
Alok Sanghavi - Achronix Semiconductor Corp., Santa Clara, CA
123.15In-design Power Grid and IR Drop Optimization for High Performance Arm CPUs
 Speaker: Sainarayanan Karatholuvu Suryanarayanan - Arm, Ltd., Bangalore, India
 Authors: Sainarayanan Karatholuvu Suryanarayanan - Arm, Ltd., Bangalore, India
Sreeram Chandrasekar - Cadence Design Systems, Inc., Bangalore, India
Vidyasagar Jampala - Cadence Design Systems, Inc., Bangalore, India
Vinay Krishnan - Cadence Design Systems, Inc., Bangalore, India
123.16Advanced Low Power Debug using Static Techniques
 Speaker: Himanshu Bhatt - Synopsys India Pvt. Ltd., Bangalore, India
 Author: Himanshu Bhatt - Synopsys India Pvt. Ltd., Bangalore, India
123.17Current Flow Modelling in HDL for Mixed-signal Co-simulation Analysis
 Speaker: Lakshmanan Balasubramanian - Texas Instruments India Pvt. Ltd. & IEEE , Bengaluru, India
 Authors: Lakshmanan Balasubramanian - Texas Instruments India Pvt. Ltd. & IEEE , Bengaluru, India
Vijaykumar Sankaran - Cadence Design Systems, India Pvt. Ltd., Bangalore, India
Sushmitha T G - KarMic Design Pvt. Ltd., Udupi, India
Abhishek K - KarMic Design Pvt. Ltd., Manipal, India
Sunita Tirlapur - KarMic Design Pvt. Ltd., Manipal, India
123.18Multimodal CDC Analysis
 Speaker: Maël Rabé - STMicroelectronics & Univ. Grenoble Alpes, Grenoble, France
 Authors: Maël Rabé - STMicroelectronics & Univ. Grenoble Alpes, Grenoble, France
Jean-Christophe Brignone - STMicroelectronics, Grenoble, France
Paras Mal Jain - Synopsys, Inc., Mountain View, CA
Ankush Bagotra - Synopsys, Inc., Sunnyvale, CA
123.19Machine Learning based Timing Arc Prediction for AMS Design
 Speaker: Eric Hsu - NVIDIA Corp. & Huada Empyrean Software Co., Ltd, Santa Clara, CA
 Authors: Eric Hsu - NVIDIA Corp. & Huada Empyrean Software Co., Ltd, Santa Clara, CA
Ting Ku - NVIDIA Corp. & Huada Empyrean Software Co., Ltd, Santa Clara, CA
George Kokai - NVIDIA Corp. & Huada Empyrean Software Co., Ltd, Santa Clara, CA
Zuhaib Sheikh - NVIDIA Corp. & Huada Empyrean Software Co., Ltd, Santa Clara, CA
Tian Yang - NVIDIA Corp. & Huada Empyrean Software Co., Ltd, Santa Clara, CA
123.20Accelerate your Verification using DFT Emulation: A Real Test-chip Showcasing Reduction in Verification Time from Weeks to Minutes
 Speaker: Jitendra Aggarwal - Arm, Ltd., Bangalore, India
 Author: Jitendra Aggarwal - Arm, Ltd., Bangalore, India
123.21Metric Driven Power Regression - A Methodology based Metric Driven Approach for Power Regressions
 Speaker: Mohammed Fahad - Mentor, A Siemens Business & Mentor Graphics (India) Pvt. Ltd., Noida, India
 Authors: Mohammed Fahad - Mentor, A Siemens Business & Mentor Graphics (India) Pvt. Ltd., Noida, India
Qazi Faheem Ahmed - Mentor Graphics (India) Pvt. Ltd. & Mentor Graphics (India) Pvt. Ltd., Noida, India
Tarak Parikh - Mentor, A Siemens Business & Mentor Graphics (India) Pvt. Ltd., Noida, India
Manish Kumar - Mentor Graphics (India) Pvt. Ltd. & Mentor Graphics (India) Pvt. Ltd., Noida, India
Vishnu Kanwar - Mentor, A Siemens Business & Mentor Graphics (India) Pvt. Ltd., Noida, India
Neeraj Joshi - Mentor, A Siemens Business & Mentor Graphics (India) Pvt. Ltd., Noida, India
Amit Kumar - Mentor, A Siemens Business & Mentor Graphics (India) Pvt. Ltd., Noida, India
Nupur Shikha - Mentor, A Siemens Business & Mentor Graphics (India) Pvt. Ltd., Noida, India
123.22Data Analytics Engine For Design Area Analysis and Tracking
 Speaker: Aswani Kumar Golla - Texas Instruments India Pvt. Ltd.
 Authors: Aswani Kumar Golla - Texas Instruments India Pvt. Ltd.
Akshay Barapatre - Texas Instruments India Pvt. Ltd., Bangalore, India
123.23Determining the Preferred Methodology for Timing Analysis and Signoff on Mixed Signal Designs in FinFET Technology Nodes
 Speaker: Ankit Kamleshbhai Zalawadiya - Advanced Micro Devices, Inc.
 Authors: Krishnan-Talkad Sukumar - Advanced Micro Devices, Inc., Bangalore, India
Hariprasad T. T - Advanced Micro Devices, Inc., Bangalore, India
David Newmark - Advanced Micro Devices, Inc., Austin, TX
Ankit Kamleshbhai Zalawadiya - Advanced Micro Devices, Inc.
123.24Advances in Formal Connectivity Checking - A Case Study on a Multi-Billion-Gate SoC
 Speaker: Sasa Stamenkovic - OneSpin Solutions GmbH, San Jose, CA
 Authors: Imtiyaz Ron - Xilinx Inc., San Jose, CA
Sasa Stamenkovic - OneSpin Solutions GmbH, San Jose, CA
Sergio Marchese - OneSpin Solutions GmbH, Bristol, United Kingdom
123.25“River Fishing”:Leverage Simulation Coverage to Drive Formal Bug Hunting
 Speaker: Joe Hupcey III - Mentor, A Siemens Business, Fremont, CA
 Authors: Ping Yeung - Mentor, A Siemens Business, Fremont, CA
Joe Hupcey III - Mentor, A Siemens Business, Fremont, CA
123.26Reliability Challenges of Advanced Semiconductor Technologies-A Designer’s Perspective
 Speaker: Atul Bhargava - STMicroelectronics, Greater Noida, India
 Authors: Atul Bhargava - STMicroelectronics, Greater Noida, India
Abhay Apte - Cadence Design Systems, Inc., Noida, India
123.27Enhanced-regression Techniques to Improve Layout Verification Coverage
 Speaker: Samichi S - Intel Corp. & Intel Technology India Pvt. Ltd., Bangalore, India
 Authors: Samichi S - Intel Corp. & Intel Technology India Pvt. Ltd., Bangalore, India
Rajesh Karturi - Intel Corp. & Intel Corp., Bangalore, India
Kumar Sayak - Intel Technology India Pvt. Ltd. & Intel Corp., Bangalore, India
Kaushik Kumar Dhang - Intel Corp. & Intel Technology India Pvt. Ltd., Bangalore, India
123.28Comprehensive Chip-Package-System (CPS) Electrostatic Discharge (ESD) Simulation
 Speaker: Junyong Deng - Unisoc Communications, Inc., Shanghai, China
 Authors: Junyong Deng - Unisoc Communications, Inc., Shanghai, China
Shuqiang Zhang - ANSYS, Inc., Shanghai, China
Yaliang Li - ANSYS, Inc., Shanghai, China