TUESDAY July 21, 1:30pm - 3:00pm
TOPIC AREA: IP, DESIGN
KEYWORD: HARDWARE SECURITY, VERIFICATION/VALIDATION, ANY
EVENT TYPE: IP TRACK
Why Care About IP Security Assurance – What Could go Wrong?
Chair:
Kathy Hayashi - Qualcomm Technologies, Inc., San Diego, CA
Organizer:
Brent Sherman - Intel Corp., Portland, OR

Special/Invited Session

Silicon chips are comprised of multiple components referred to as Intellectual Property (IP) blocks or just 'IP.'  These blocks come from multiple sources such as internal development teams, IP suppliers, tool-generated IP, etc. Typically, the product owner integrates multiple IPs from multiple sources, which raises concerns about the security risk. How much risk is the product owner inheriting? What potential security concerns exist that the Integrator must address to ensure the security objectives of the product are upheld? This session will introduce an emerging new standard called IP Security Assurance aimed to address security concerns in IP. Additionally, there will be a discussion on 3rd party IP security risks associated with FPGA bitstream integration and key learnings from an IP supplier performing security assurance.


Thank you to our IP Track Sponsor:


29.1Accellera’s IP Security Assurance Standard
 Speaker: Brent Sherman - Intel Corp., Portland, OR
 Author: Brent Sherman - Intel Corp., Portland, OR
29.23PIP Security Concerns for FPGA Bitstream Integration
 Speaker: Steve McNeil - Xilinx Inc., Albuquerque, NM
 Author: Steve McNeil - Xilinx Inc., Albuquerque, NM
29.3Looking Back After 40 IP Security Risk Assessments - Lessons Learned
 Speaker: Mike Borza - Synopsys, Inc., Kanata, ON, Canada
 Author: Mike Borza - Synopsys, Inc., Kanata, ON, Canada