TUESDAY July 21, 3:30pm - 4:30pm
TOPIC AREA: DESIGN, IP
KEYWORD: LOW POWER, EMERGING TECHNOLOGIES, IMPLEMENTATION
EVENT TYPE: DESIGNER TRACK
Near Threshold Voltage: A Much Needed Reality or Risky Dream?
Moderator:
Brian Bailey - Semiconductor Engineering, Beaverton, OR
Organizer:
Jan Willis - Calibra Consulting, Menlo Park, CA

Designer Track Panel

Energy consumption is a key design parameter today and will only become more critical in the coming years as the IoT expands. The intense focus on low-power design has brought the once-sidelined idea of near-threshold voltage (NTV) design back into the spotlight because lowering voltage is the most straightforward way to minimize energy consumption. NTV, with its widely different variance effects and the corresponding mandatory statistical approach, has to still fit into the industry-standard models of testing, validation, and product category generation. If NTV excessively disrupts the industry-standard design pipeline, it will in all likelihood fail. Will NTV become a reality or a far-fetched dream?  What are the risks of such an approach?  How will design teams implement NTV design? What applications will drive NTV to reality? What lessons have been learned?  


Panelists:
Joachim Rodrigues - Xenergic AB, Lund, Switzerland
Lauri Koskinen - Minima Processor Oy, Helsinki, Finland
Mike Eftimakis - Arm, Ltd., Cambridge, United Kingdom
Lluis Paris - Taiwan Semiconductor Manufacturing Co., Ltd., San Jose, CA

Thank you to our Designer Track Sponsor: