MONDAY July 20, 4:00pm - 5:30pm
TOPIC AREA: EDA, IP
KEYWORD: VERIFICATION/VALIDATION, TEST/MANUFACTURING/RELIABILITY/SAFETY, AUTOMOTIVE
EVENT TYPE: DESIGNER TRACK
QED and Symbolic QED: Dramatic Advances in Verification and Validation
Chair:
Adriana Maggiore - Google, Inc., Mountain View, CA
Organizer:
Keerthikumara Devarajegowda - Infineon Technologies AG, Munich, Germany

Special/Invited Session

Bug escapes that are detected during system operation in the field can have disastrous consequences, especially for critical domains such as automotive applications. With the increasing complexity and reduced time for verification, state-of-the-art industrial flows for both pre-silicon verification and post-silicon validation will soon become untenable. Subhasish Mitra/Clark Barrett (Stanford) will present a new end-to-end approach for pre-silicon verification and post-silicon validation of digital systems. Industrial case-studies (Intel, AMD, Freescale/NXP) will be covered. Keerthi Devarajegowda/Wolfgang Ecker (Infineon) will present a study conducted at Infineon that demonstrates the effectiveness of Symbolic QED for industrial automotive processors. The results show that Symbolic QED drastically improves verification productivity 60-fold while detecting all (known) bugs and more, compared to state-of-the-art industrial flows.


Thank you to our Designer Track Sponsor:


7.2QED and Symbolic QED: Dramatic Advances
 Speakers: Subhasish Mitra - Stanford Univ., Stanford, CA
Clark Barrett - Stanford Univ., Stanford, CA
 Authors: Subhasish Mitra - Stanford Univ., Stanford, CA
Clark Barrett - Stanford Univ., Stanford, CA
7.3Symbolic QED Pre-Silicon Verification of Automotive Microcontroller Cores: Infineon Case Study
 Speaker: Keerthikumara Devarajegowda - Infineon Technologies AG, Munich, Germany
 Authors: Keerthikumara Devarajegowda - Infineon Technologies AG, Munich, Germany
Wolfgang Ecker - Infineon Technologies AG, Munich, Germany