MONDAY July 20, 1:30pm - 3:00pm
TOPIC AREA: EDA, DESIGN
KEYWORD: VERIFICATION/VALIDATION, FRONT END DESIGN, EMERGING TECHNOLOGIES
EVENT TYPE: DESIGNER TRACK
New Frontiers in Formal, Static, and UVM-Based Verification
Chair:
Achutha Kirankumar V M - Intel Corp., Bangalore, India
Formal and static methods continue to be a critical and growing part of verification. The first half of this session will present new techniques in this area for deadlock verification, finite state machine checks, and reset domain crossing (RDC) challenges. However, simulation continues to be a critical lynchpin of our validation strategies. The second half of this session will present some new ideas for effective UVM-based simulation.

Thank you to our Designer Track Sponsor:


4.1Easy Deadlock Verification and Debug with Advanced Formal Verification
 Speaker: Laurent Arditi - Arm, Ltd., Valbonne, France
 Authors: Laurent Arditi - Arm, Ltd., Valbonne, France
Vincent Abikhattar - Arm, Ltd., Sophia-Antipolis, France
Joe Hupcey III - Mentor, A Siemens Business, Fremont, CA
Jeremy Levitt - Mentor, A Siemens Business, Fremont, CA
4.2Robust FSM Verification Aspects – A Formal Methodology
 Speaker: Abhinav Parashar - Texas Instruments India Pvt. Ltd., Bengaluru, India
 Authors: Abhinav Parashar - Texas Instruments India Pvt. Ltd., Bengaluru, India
Pooja S. Bhat - Texas Instruments India Pvt. Ltd., Bengaluru, India
Harish Maruthiyodan - Texas Instruments India Pvt. Ltd., Bangalore, India
4.3Innovative Techniques to Solve Complex RDC Challenges
 Speaker: Rohit K. Sinha - Intel Technology India Pvt. Ltd., Bangalore, India
 Author: Rohit K. Sinha - Intel Technology India Pvt. Ltd., Bangalore, India
4.4Achieve Better Communication in Your UVM TB Using These Obscure UVM Classes
 Speaker: Pavan Yeluri - NVIDIA Corp., Hyderabad, India
 Authors: Pavan Yeluri - NVIDIA Corp., Hyderabad, India
Ranjith Nair - NVIDIA Corp., Hyderabad, India
4.5A Novel Methodology Applying Dynamic Save and Restart to SOC Verification
 Speaker: Jicheon Kim - Samsung Electronics Co., Ltd., Hwaseong, Republic of Korea
 Authors: Jicheon Kim - Samsung Electronics Co., Ltd., Hwaseong, Republic of Korea
Minjae Kim - Samsung Electronics Co., Ltd., Hwaseong, Republic of Korea
Daewoo Kim - Samsung Electronics Co., Ltd., Hwaseong, Republic of Korea
Seonil B. Choi - Samsung Electronics Co., Ltd., Hwaseong, Republic of Korea
4.6UVM VIP Test Intent Reuse from IP to Sub System and SOC Using Portable Stimulus
 Speaker: Sastry N. Puranapanda - Silicon Interfaces, Mumbai, India
 Authors: Sastry N. Puranapanda - Silicon Interfaces, Mumbai, India
Priyanka Gharat - Silicon Interfaces, Mumbai, India
Kiran Malvi - Silicon Interfaces, Mumbai, India