DAC Video Archive

Video Results for 48th DAC (2011)

6.1 Dimetrodon: Processor-Level Preventive Thermal Management via Idle Cycle Injection

6.2 Dynamic Thermal Management for Multimedia Applications Using Machine Learning

6.3 Improved Post-Silicon Power Modeling Using AC Lock-In Techniques

6.4 Thermal Signature: A Simple Yet Accurate Thermal Index for Floorplan Optimization

8.1 Scalable Parts Families, Context, and Computational Design for Gene Expression Engineering

8.2 Gene and Cellular Circuit Design

8.3 A Verifying Compiler for DNA Chemical Reaction Networks

12.1 TSV Stress-Aware, Full-Chip Mechanical Reliability Analysis and Optimization for 3-D IC

12.2 Hybrid Modeling of Non-Stationary Process Variations

12.3 Efficient SRAM Failure Rate Prediction via Gibbs Sampling

12.4 Direct Matrix Solution of Linear Complexity for Surface Integral Equation-Based Impedance Extraction of High Bandwidth Interconnects

18.1 MUSTARD: A Coupled, Stochastic-Deterministic, Discrete-Continuous Technique for Predicting the Impact of Random Telegraph Noise on SRAMs and DRAMs

18.2 Fast, Non-Monte-Carlo Transient Noise Analysis for High-Precision Analog/RF Circuits by Stochastic Orthogonal Polynomials

18.3 Automatic Stability Checking for Large, Linear Analog Integrated Circuits

18.4 Performance Bound Analysis of Analog Circuits Considering Process Variations

18.5 Rethinking Memory Redundancy: Optimal Bit Cell Repair for Maximum-Information Storage

18.6 Programmable Analog Device Array (PANDA): A Platform for Transistor-Level Analog Reconfigurability

19 EDA Research: Stalled, Driving in Circles, or Running out of Gas?

24.1 Leakage-Aware Redundancy for Reliable Subthreshold Memories

24.2 A 40nm Inverse Narrow-Width, Effect-Aware Subthreshold Standard Cell Library

24.3 Layout-Aware, Line-Edge Roughness Modeling and Poly-Optimization for Leakage Minimization

24.4 Post Sign-Off Leakage Power Optimization

25 Software-Hardware Verification Battle: Prototyping vs. Emulation

31 The Billion Dollar Question: How to Verify Billion-Gate Designs

37 ESL HW/SW Verification: A Reality Check

43 Double Trouble or Double Your Fun: Double-Patterning and Variability

49 Parallel or Paralyzing: Is Parallel EDA Worth the Trouble?

CONVENED TUESDAY, June 07, 2011, 10:30 AM - 12:00 PM
VIDEO: SESSION 6
TOPIC AREA: LOW-POWER DESIGN

RESEARCH PAPER SESSION: Thermal Management and Modeling for Integrated Circuits

Chair:

Ayse Coskun - Boston Univ., Boston, MA

The papers in this session address thermal considerations for integrated circuits. The session starts with two papers that present novel dynamic thermal management techniques for microprocessors. The first paper presents a technique for inserting idle cycles for thermal control. The second paper uses a machine-learning based technique for voltage and frequency control that is effective for multimedia applications. The third paper presents a technique to improve power models using post-silicon IR analysis, and the last paper presents a computationally efficient metric that correlates with temperature and is used for floorplan optimization.

6.1	Dimetrodon: Processor-Level Preventive Thermal Management via Idle Cycle Injection
	Speaker:	Peter D. Bailis - Harvard Univ., Cambridge, MA
	Authors:	Peter D. Bailis - Harvard Univ., Cambridge, MA Vijay Janapa Reddi - Advanced Micro Devices, Inc., Cambridge, MA Sanjay Gandhi - Harvard Univ., Cambridge, MA David Brooks - Harvard Univ., Cambridge, MA Margo Seltzer - Harvard Univ., Cambridge, MA
6.2	Dynamic Thermal Management for Multimedia Applications Using Machine Learning
	Speaker:	Yang Ge - SUNY Binghamton, Vestal, NY
	Authors:	Yang Ge - SUNY Binghamton, Vestal, NY Qinru Qiu - SUNY Binghamton, Vestal, NY
6.3	Improved Post-Silicon Power Modeling Using AC Lock-In Techniques
	Speaker:	Abdullah N. Nowroz - Brown Univ., Providence, RI
	Authors:	Abdullah N. Nowroz - Brown Univ., Providence, RI Gary Woods - Rice Univ., Houston, TX Sherief Reda - Brown Univ., Providence, RI
6.4	Thermal Signature: A Simple Yet Accurate Thermal Index for Floorplan Optimization
	Speaker:	Jaeha Kung - KAIST, Daejeon, Republic of Korea
	Authors:	Jaeha Kung - KAIST, Daejeon, Republic of Korea Inhak Han - KAIST, Daejeon, Republic of Korea Sachin S. Sapatnekar - Univ. of Minnesota, Minneapolis, MN Youngsoo Shin - KAIST, Daejeon, Republic of Korea

DAC Video Archives